1. Field of the Invention
This invention relates to a delay circuit for use in equalization of a video signal and more particularly for use in vertical aperture equalization thereof.
In a video system which includes a television receiver or a pickup device, the operating frequency band of a video signal is generally processed through a variety of limiter and signal transmission circuits resulting in attenuation of the higher frequency component of the video signal and thereby reducing the video resolution. For example, when a chrominance subcarrier of 3.58 megahertz (MHz) is superposed on a luminance signal in a video amplifier circuit of a color television receiver, a luminance variation or beat of 3.58 MHz occurs. In order to eliminate such beat disturbance, the video amplifier circuit is designed with proper frequency characteristics such that the chrominance subcarriers at more than 15 to 16 decibels are attenuated. Typically, however, such attenuation also attenuates the higher frequency component of the video signal resulting in deterioration in the resolution of the reproduced picture. Additionally, in a shadow-mask type CRT, as the video signal frequency exceeds 2 MHz, the luminance modulation efficiency is gradually reduced, which diminishes the picture contrast and reduces the luminance modulation efficiency and thereby results in deterioration of the video resolution.
In compensating for such deterioration of resolution, it has been customary heretofore to perform aperture equalization by superposing a correction signal on the luminance signal so as to enhance the sharpness in the aperture of the picture. Generally, an overshoot or undershoot ranging from 20 to 30 percent is applied to a portion of the luminance signal waveform corresponding to the aperture of the picture, hence increasing the aperture sharpness and thereby enhancing the resolution.
2. Description of the Prior Art
In order to attain a higher vertical resolution, for example, a vertical aperture equalizer circuit 10, as shown in FIG. 1, has been commonly used heretofore.
An input luminance signal Yin to be equalized with regard to the aperture is fed to both a delay circuit 2 and a first signal adder 3 through a signal input terminal 1.
Delay circuit 2 includes two delay lines 23 and 24 each having a delay time .tau. equivalent to one horizontal scanning interval (1H) of input luminance signal Yin. A first delayed luminance signal Y.sub.DL1Y is delayed for a time of 1H relative to the input luminance signal Yin by delay line 23. A second delayed luminance signal Y.sub.DL2 is delayed for an additional 1H time period to the first delayed luminance signal by second delay line 24. In delay circuit 2, the input luminance signal Yin, which is fed through input terminal 1, is superposed on a carrier, which is generated by an oscillator 22, in an amplitude modulator 21. The output of amplitude modulator 21 is fed to a first signal demodulator 25 via first delay line 23 and also to a second signal demodulator 26 via second delay line 24 which is connected in series with first delay line 23. Referring to FIG. 2, when an input luminance signal Yin, as shown in FIG. 2A, is fed to input terminal 1, signal demodulator 25 demodulates the luminance signal delayed for 1H by first delay line 23 and produces a first delayed luminance signal Y.sub.DL1, as shown in FIG. 2B, having a delay of 1H relative to input luminance signal Yin. Additionally, the second signal demodulator 26 demodulates the luminance signal which has been delayed for 2H due to sequential 1H delays by delay lines 23 and 24, and thereby produces a second delayed luminance signal Y.sub.DL2, as shown in FIG. 2C, having a delay of 2H relative to the input luminance signal Yin.
First signal Y.sub.DL1 is supplied to both a signal subtracter 5 and a second signal adder 7, second signal Y.sub.DL2 is supplied to first signal adder 3.
First signal adder 3 mixer input luminance signal Yin and second delayed luminance signal Y.sub.DL2 together and supplies an output thereof to a signal attenuator 4 which produces a composite signal Y.sub.A as shown in 2D. Composite signal Y.sub.A is fed to signal subtracter 5 which subtracts signal Y.sub.A from first delayed luminance signal Y.sub.DL1 and produces an aperture equalizing signal S.sub.AC as shown in FIG. 2E. Signal S.sub.AC is fed via a level controller 6 to a second signal adder 7, which superposes signal S.sub.AC on first delayed luminance signal Y.sub.DL1.
The output luminance signal Y.sub.OUT, which is obtained at an output terminal 8 from second signal adder 7, has a corrected waveform with vertical aperture equalization as shown in FIG. 2F. More specifically, vertical aperture equalization occurs since the aperture equalizing signal S.sub.AC is superposed on the vertical aperture of the picture where the luminance variation is present.
As described heretofore, vertical aperture equalizer circuit 10 requires that delay circuit 2 include two 1H delay lines 23 and 24 to produce a first delayed luminance signal Y.sub.DL1 having a delay time of 1H relative to the input luminance signal Yin and a second delayed luminance signal Y.sub.DL2 having a delay time of 2H relative to signal Yin.
Generally each delay line is expensive and dimensionally large, making it difficult to produce a compact delay line structure. In a conventional vertical aperture equalizer circuit, such as a circuit 10, which includes two high performance 1H delay lines, each having a relative large delay time .tau. and requiring wide-band characteristics, results in an unavoidably large spatial requirement of an extremely high production cost. In fact, substantially the entire cost of the circuit is based on delay lines 23 and 24.